D'où
une possibilité pour le programme complet :
ENTITY CMICODBI IS
PORT (CLK,din: IN bit;
sligne : OUT bit);
END CMICODBI;
ARCHITECTURE BEHAVIOR OF CMICODBI IS
SIGNAL sreg : bit_vector (2 DOWNTO 0);
CONSTANT pun0 : bit_vector (2 DOWNTO 0) :="110";
CONSTANT pun1 : bit_vector (2 DOWNTO 0) :="111";
CONSTANT pzero0 : bit_vector (2 DOWNTO 0) :="001";
CONSTANT pzero1 : bit_vector (2 DOWNTO 0) :="101";
CONSTANT zun0 : bit_vector (2 DOWNTO 0) :="010";
CONSTANT zun1 : bit_vector (2 DOWNTO 0) :="011";
CONSTANT zzero0 : bit_vector (2 DOWNTO 0) :="000";
CONSTANT zzero1 : bit_vector (2 DOWNTO 0) :="100";
BEGIN
sligne <= sreg(2);
PROCESS
BEGIN
wait until clk = '1';
CASE sreg IS
WHEN pun0 =>
IF ( din='1' ) THEN
sreg<=pun1;
ELSE
sreg<=pzero0;
END IF;
WHEN pun1 =>
IF ( din='0' ) THEN
sreg<=pzero0;
ELSE
sreg<=zun0;
END IF;
WHEN pzero0
=>
IF ( din='0' ) THEN
sreg<=pzero1;
ELSE
sreg<=zun0;
END IF;
WHEN pzero1
=>
IF ( din='1' ) THEN
sreg<=zun0;
ELSE
sreg<=pzero0;
END IF;
WHEN zun0 =>
IF ( din='1' ) THEN
sreg<=zun1;
ELSE
sreg<=zzero0;
END IF;
WHEN zun1 =>
IF ( din='0' ) THEN
sreg<=zzero0;
ELSE
sreg<=pun0;
END IF;
WHEN zzero0
=>
IF ( din='0' ) THEN
sreg<=zzero1;
ELSE
sreg<=pun0;
END IF;
WHEN zzero1
=>
IF ( din='1' ) THEN
sreg<=pun0;
ELSE
sreg<=zzero0;
END IF;
END CASE;
END PROCESS;
END BEHAVIOR;